At the Hot Chips 2023 conference, Intel revealed more details about its upcoming 6th generation Xeon Scalable processors, codenamed Sierra Forest and Granite Rapids. These processors will feature a new chiplet-based design with two types of cores: E-cores for efficiency and P-cores for performance. Intel claims that these processors will offer significant improvements in performance, power efficiency, and scalability for data center workloads.
Sierra Forest: The First E-Core Xeon Processor
Sierra Forest is the first Xeon processor to use Intel’s E-cores, which are based on the Sierra Glen architecture. E-cores are designed to be area-efficient and power-efficient, enabling higher core counts and lower power consumption. Intel says that Sierra Forest will provide up to 2.5x better rack density and 2.4x higher performance per watt than its 4th generation Xeon processors, codenamed Sapphire Rapids.
Sierra Forest will also be the first Xeon processor to use Intel’s 3 process node, which employs extreme ultraviolet (EUV) lithography for finer features and lower power leakage. Intel says that its 3 process node will deliver a 20% improvement in transistor performance and a 40% reduction in power consumption compared to its 7 process node.
Sierra Forest will be available in the first half of 2024, and will be compatible with the Birch Stream platform, which supports DDR5 memory, PCIe 5.0, CXL 2.0, and UPI 3.0 interconnects.
Granite Rapids: The Next-Generation P-Core Xeon Processor
Granite Rapids is the next-generation Xeon processor that uses Intel’s P-cores, which are based on the Redwood Cove architecture. P-cores are designed to deliver high performance and scalability for demanding workloads, such as artificial intelligence (AI), high-performance computing (HPC), and cloud computing. Intel says that Granite Rapids will provide 2 to 3x the performance in mixed AI workloads, partially stemming from a 2.8X improvement in memory bandwidth.
Granite Rapids will also use Intel’s 3 process node, and will be available shortly after Sierra Forest in 2024. Granite Rapids will also be compatible with the Birch Stream platform, and will support AVX-512 instructions for vector processing.
A Common Platform for E-Cores and P-Cores
One of the key features of the 6th generation Xeon Scalable processors is that they share a common platform, which means that they use the same socket, memory, I/O chiplets, firmware, and software stack. This allows customers to choose between E-core or P-core processors based on their workload needs, without having to change their hardware or software infrastructure.
Both Sierra Forest and Granite Rapids use a chiplet-based design, which consists of two I/O chiplets and one to three compute chiplets. The I/O chiplets are fabricated on Intel’s 7 process node, and contain the memory controllers, PCIe controllers, UPI links, and other I/O functions. The compute chiplets are fabricated on Intel’s 3 process node, and contain the cores, caches, memory channels, and fabric agents.
The chiplets are connected by Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology, which provides high-bandwidth and low-latency communication between the chiplets. The compute chiplets can also share their L3 cache in a logically monolithic mesh configuration, or be partitioned into sub-NUMA clusters for lower latency.
A Competitive Edge for Intel in the Data Center Market
With the introduction of the 6th generation Xeon Scalable processors, Intel aims to regain its competitive edge in the data center market, which has been challenged by rivals such as AMD and Nvidia. By offering two types of cores with different performance and efficiency characteristics, Intel hopes to address a wider range of data center workloads and customer preferences.
Intel also claims that its new process node and chiplet design will enable faster innovation cycles and better scalability than its competitors. Intel says that it expects to deliver a new Xeon processor every year until at least 2025, following a cadence of process-architecture-optimization (PAO). In addition to Sierra Forest and Granite Rapids in 2024, Intel plans to launch Clearwater Forest in 2025, which will use a new architecture based on Intel’s 20A process node.
